Product Summary
The 72V225 is a CMOS SyncFIFO designed to run off a 3.3V supply for exceptionally low power consumption. The device is very high-speed, low-power First-In, First-Out (FIFO) memories with clocked read and write controls. This FIFO is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. The 72V225 has 18-bit input and output ports. The input port is controlled by a free-running clock (WCLK), and an input enable pin (WEN).
Parametrics
72V225 absolute maximum ratings: (1)VTERM, Terminal Voltage with respect to GND: -0.5 to +5 V; (2)TSTG, Storage Temperature: -55 to +125℃; (3)IOUT, DC Output Current: -50 to +50 mA.
Features
72V225 features: (1)1,024 x 18-bit organization array (IDT72V225); (2)10 ns read/write cycle time; (3)5V input tolerant; (4)IDT Standard or First Word Fall Through timing; (5)Single or double register-buffered Empty and Full flags; (6)Easily expandable in depth and width; (7)Asynchronous or coincident Read and Write Clocks; (8)Asynchronous or synchronous programmable Almost-Empty and Almost-Full flags with default settings; (9)Half-Full flag capability; (10)Output enable puts output data bus in high-impedanc state; (11)High-performance submicron CMOS technology; (12)Available in a 64-lead thin quad flatpack (TQFP/STQFP); (13)Industrial temperature range (-40℃ to +85℃) is available.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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72V225L10PF8 |
Other |
Data Sheet |
Negotiable |
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72V225L10PFG |
Other |
Data Sheet |
Negotiable |
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72V225L10PFG8 |
Other |
Data Sheet |
Negotiable |
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72V225L10TF |
Other |
Data Sheet |
Negotiable |
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72V225L10TF8 |
Other |
Data Sheet |
Negotiable |
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72V225L10TFG |
IDT |
FIFO 1Kx18 3.3V SYNC FIFO |
Data Sheet |
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72V225L15PF |
Other |
Data Sheet |
Negotiable |
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72V225L15PF8 |
Other |
Data Sheet |
Negotiable |
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