(Hong Kong)
Product Summary
The XC2V6000-FF1152A is a platform FPGA developed for high performance from low-density to high-density designs that are based on IP cores and customized modules. The XC2V6000-FF1152A delivers complete solutions for telecommunication, wireless, networking, video, and DSP applications, including PCI, LVDS, and DDR interfaces. Combining a wide variety of flexible features and a large range of densities up to 10 million system gates, the XC2V6000-FF1152A enhances programmable logic design capabilities and is a powerful alternative to mask-programmed gates arrays.
Parametrics
XC2V6000-FF1152A absolute maximum ratings: (1)Supply voltage relative to GND: -0.5 to +7.0V; (2)Input voltage relative to GND: -0.5 to VCC +0.5V; (3)Voltage applied to High-Z output: -0.5 to VCC +0.5V; (4)Storage temperature (ambient): -65 to +150℃; (5)Junction temperature: +125℃.
Features
XC2V6000-FF1152A features: (1)Densities from 40K to 8M system gates; (2)420 MHz internal clock speed (Advance Data); (3)840+ Mb/s I/O (Advance Data); (4)3 Mb of True Dual-Port RAM in 18-Kbit block SelectRAM resources; (5)Up to 1.5 Mb of distributed SelectRAM resources; (6)High-performance interfaces to external memory; (7)Dedicated 18-bit x 18-bit multiplier blocks; (8)Fast look-ahead carry logic chains; (9)Up to 93,184 internal registers / latches with Clock Enable; (10)Up to 93,184 look-up tables (LUTs) or cascadable 16-bit shift registers; (11)Wide multiplexers and wide-input function support; (12)Horizontal cascade chain and Sum-of-Products support; (13)Internal 3-state bussing; (14)Fourth generation segmented routing structure; (15)Predictable, fast routing delay, independent of fanout; (16)Up to 1,108 user I/Os; (17)19 single-ended standards and six differential standards; (18)Programmable sink current (2 mA to 24 mA) per I/O; (19)Fast SelectMAP configuration; (20)Triple Data Encryption Standard (DES) security option (Bitstream Encryption); (21)IEEE1532 support ; (22)Partial reconfiguration; (23)Unlimited re-programmability; (24)Readback capability.
Diagrams
